Alexandre Singer

Electrical & Computer Engineering student at the University of Toronto.

About me

Hi I'm Alex, and this is my website. I am a fast learner, having developed strong technical and interpersonal skills through academic and practical work experiences. I Work effectively in teams, and am often selected by the group to assume leadership positions. I am driven, hard-working, and always looking for opportunities to grow my skills.

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Most Recent Publication

Tiling for DMA-Based Hardware Accelerators (WIP)

Many hardware accelerator architectures use DMA units to transfer memory which may be limited by the fixed-width size of the DMA transfer, and automatic loop tilers currently do not take the limitation of these DMA units into account. We present a compiler pass, implemented in MLIR, that uses polyhedral analysis on the memory access patterns in a loop nest and constrain the possible tile sizes based on the DMA chunk width. This allows the compiler to effectively tile loops for these architectures.

Alexandre Singer and Kai-Ting Amy Wang. 2023. Tiling for DMA-Based Hardware Accelerators (WIP). In Proceedings of the 24th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2023). Association for Computing Machinery, New York, NY, USA. 5 pages.

Keywords: Optimizations, Compiler, Tiling, Hardware Accelerators, MLIR, Polyhedral

Selected Project

Powering the Future of Travel: An Efficient and Safe Power System Architecture for Hyperloop

embedded programming
electrical engineering