SYCLops: A SYCL Specific LLVM to MLIR Converter

Alexandre Singer, Frank Gao and Kai-Ting Amy Wang.
In International Workshop on OpenCL (IWOCL)
May 2022

Summary

SYCLops: A SYCL Specific LLVM to MLIR Converter. Alexandre Singer, Frank Gao and Kai-Ting Amy Wang. In International Workshop on OpenCL (IWOCL). May 2022. IWOCL 2022
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Talk

Abstract

There is a growing need for higher level abstractions for device kernels in heterogeneous environments, and the multi-level nature of the MLIR infrastructure perfectly addresses this requirement. As SYCL begins to gain industry adoption for heterogeneous applications and MLIR continues to develop, we present SYCLops: a converter capable of translating SYCL specific LLVM IR to MLIR. This will allow for both target and application specific optimizations within the same framework to exploit opportunities for improvement present at different levels.

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Presented at the International Workshop on OpenCL (IWOCL) & SYCLCon’22 conference. IWOCL

The LLVM Project is an open-source compiler framework that takes source files, written in a supported programming language (like C++), optimizes it, and then lowers it to binary. LLVM uses an intermediate representation of the code called LLVMIR. LLVMIR is low level, so it can be lowered to a target binary, however high enough level to perform optimizations for CPU targets.

Multi-Level Intermediate Representation, or MLIR, is a relatively new framework based off the LLVM project. It mixes different levels of abstraction within the same source file, allowing for higher level optimizations, including affine analysis.

SYCL is a C++ abstraction layer for heterogeneous applications (code to be run on a host CPU and some other device, like hardware accelerators). oneAPI is an implementation of SYCL, based off LLVM, that we chose to work with. oneAPI uses LLVMIR for its device code, however we feel that MLIR would provide better optimizations for accelerator targets.

Thus, we introduce SYCLops, which is a converter capable of taking the device code from oneAPI’s SYCL implementation and converting it into MLIR. The device compiler can then perform optimizations within MLIR’s Affine dialect before lowering it back to LLVM for further optimizations and lowering.

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